代做MES205TC - Digital Electronics II Coursework 1代写留学生数据结构程序

2024-11-05 代做MES205TC - Digital Electronics II Coursework 1代写留学生数据结构程序
 

MES205TC - Digital Electronics II

Coursework 1 (90%)

Deadline: 23:59PM, 3rd, Nov, 2024

Section B The design of digital circuits based on experiments (40 marks)

Introduction:

In this section, we will conduct three experiments in which we will design and build digital circuits. You are required to complete all the questions based on the experiments.

Submission:

You are required to submit your answers with circuit graph and measurement results, as well as the basic theory. An example will be shown during the Lab session. Please submit an electronic copy (PDF is preferred) on Learning Mall Online before the deadline.

Description:

2.1 The multiplexer (10 marks)

A multiplexer (MUX) is basically a switch that passes one of its data inputs through to the output, as a function of a set of select inputs.

The 74151 has eight data inputs (D0-D7) and, therefore, three data-select or address input lines (S0-S2). Three bits are required to select any one of the eight data inputs (23 = 8). A LOW on the  input allows the selected input data to pass through the output. Notice that the data output and its complement are both available. The pin diagram is shown in Figure2.1 (a), and the ANSI/IEEE logic symbol is shown in part (b).

 

Figure 2.1 The 74151 eight-input data selector/multiplexer (a) Pin diagram (b) Logic symbol

(a) Connect the 74151 to the board, and complete the table below. (2 marks)

 

(b) Implement the following expressions using a 74151, show your connection with the logic symbol, write down the truth table and verify the connection. (8 marks)

1. Y = AB’ + A’C + BC’

2. Y = AB’ + A’B

2.2 The synchronous counter (10 marks)

The 74163 is an example of an integrated circuit 4-bit synchronous binary counter. A logic symbol is shown in Figure 2.2 with pin numbers in parentheses.

 

Figure 2.2 The 74163 4-bit synchronous binary counter 

(a) Connect the 74163 to the board, preset the counter to twelve (1100) and then count up to its terminal count, fifteen (1111). How many modulus of this counter? Use the logical symbol and experimental board figures to show your connection. (4 marks)

(b) Implement a modulus-12 counter using the 74163. Describe the basic theory and your design, use the logical symbol and experimental board figures to show your connection. (6 marks)

2.3 Design of a sequence detector (20 marks)

Design a Moore sequential circuit, a sequence detector, using D flip flops. The circuit will examine the input string. Output Z = 1 immediately (during a clock cycle) when a prescribed input sequence, e.g. 111, occurs.

(a) Derive the state graph, state table, and logic equations for inputs and outputs. (10 marks)

(b) Show your design with logic circuits. (5 marks)

(c) Implement the circuits using the 7474. If the design functioned correctly indicate how it was tested. If the design did not operate as expected, then indicate possible reasons. (5 marks)

Section C The design of a traffic light control system (40 marks)

Introduction:

In this section, we will design a traffic light control system to meet the following criteria.

Consider the problem of controlling a traffic light at an intersection of two roads. The main road has more traffic and gets a longer green signal than the less busy branch road.

Assume: the minimum time interval of green light on the main road is TL, the maximum time interval of green light on the branch road is TS, short time interval of yellow light is TY, the signal of the detector on the branch road is VB. The red, green and yellow signal of the main road and the branch road is MR, MG, MY, BR, BG, BY, respectively.

Your design must obey the following rules:

· The lights on roads should go from green to yellow to red, allowing vehicles that have already crossed the stop line to go through the intersection.

· Detector VB senses vehicles on the branch road and releases them at set intervals if vehicles are present. If no vehicles are detected on the branch road, vehicles on the main road are released until a vehicle is detected on the branch road.

· When the light is green on the main road and there is no vehicle on the branch road, keep the light green on the main road.

· When the light is green on the main road and the interval TL is up, if a vehicle is waiting on the branch road, change the main road to a yellow light, then a red light, and change the branch road to a green light.

· When the light is green on the branch road and vehicles are detected on the branch road, keep the light green on the branch road until TS is up.

· When the light is green on the branch road and no vehicles are detected on the branch road, change the branch road to a yellow light, then a red light, and change the main road to a green light.

You are required to complete your design by solving the following problems.

Problems:

3.1 Analyze all the inputs and outputs of the system. (5 marks)

3.2 The system consists of combinational logic circuits (output logic circuits), and sequential logic circuits which can be controlled by timing circuits. For the sequential logic circuits,

(a) Analyze all the states, code all the states by Gray code, draw the ASM diagrams to describe the connections between the states. (10 marks)

(b) Form. the state table, derive next-state equation for the sequential circuits. (5 marks)

(c) Implement the sequential circuits by using D flip-flops and multiplexers. (5 marks)

3.3 For the timing circuits, derive logic equations (control reset and count signals). Consider TL is equal to 30 s, TS is equal to 16 s, TY is equal to 3 s. Implement this timing circuit using the 74163 (assuming the clock signal is 1HZ), multiplexers, and logic gate circuits. (7 marks)

3.4 For the combinational logic circuits (output logic circuits), which can control the red, green and yellow signal of the main road and the branch road, derive output logic equations, implement this output logic circuit by using logic gate circuits. (5 marks)

3.5 Combine the sequential logic circuits, timing circuits and output logic circuits together, to realize the design of traffic light control system (Block diagrams can be used to simplify the circuits). (3 marks)

Submission:

You are required to submit your design with required circuit graphs, as well as the basic theory and answers to the questions. Please submit an electronic copy (PDF is preferred) on LMO before the deadline.