EEET2097 ELECTRONIC CIRCUITS

ASSIGNMENT 1

An analogue amplifier circuit is shown in Figure 1 below.

Figure 1 Integrated amplifier circuit.

Circuit Data: VDD = 15 V,IREF  = I1  = I2  = 1.5 mA

Transistor Data:

Q1: NMOS, μn cox  = 80 μA⁄V2 , W⁄L =  100 μm⁄0.8 μm , Vtn  = 0.8 V, λnL  = 0.08 μm⁄V

Q2: NPN BJT, VBE   = 0.7 V, VA   = 150 V. 阝 = 100 + the last two digits of your student number (for example, if your student number is xxxxx30, β  =  100 + 30 = 130)

Q3, Q4: NMOS, μn cox  = 100  μA⁄V2 , W⁄L  =  100 μm⁄1.6 μm , Vtn  = 0.8 V, λnL = 0.10 μm⁄V

Q5, Q6: PMOS, μP cox   = 40 μA⁄V2 , W⁄L =  100 μm⁄1.6 μm , VtP  = −0.8 V, λPL  = 0.05 μm⁄V

For the amplifier circuit shown in Figure 1:

a)  Explain the function of Q1, Q2,the Q3-Q4 pair, and the Q5-Q6 pair. (8 marks)

b)  Calculate the required gate-source voltage for Q3 and Q5 (i.e., VGS3, VGS5). Ignore the channel length modulation effect. (8 marks)

c)   Calculate the value of resistor R1  to provide the required reference current IREF . (4 marks)

d)  Calculate the output resistance of the Q3-Q4 pair, and the output resistance of the Q5-Q6 pair. (8 marks)

e)   Calculate the minimum drain-source voltage for Q4 (i.e., VDS4min) and the maximum drain-source voltage Q6 (i.e., VDS6max) to ensure that Q4 and Q6 remain in the saturation region. (8 marks)

f)   Calculate the small signal parameters (including the output resistance) of Q1. (5 marks)

g)  Calculate the small signal parameters (including the output resistance) of Q2. (5 marks)

h)  Calculate the small signal voltage gain of the amplifier circuit Av   = vout ⁄vin. (6 marks)

i)   Calculate the input and output resistances of the amplifier circuit (i.e., Rin  and Rout ). (8 marks)

Use NI Multsim simulations (via RMIT myDesktop or local installation, please use this full version of Multisim for simulations) to verify your calculations of:

1) The DC bias condition VGS3, VGS5; (6 marks)

2) Your selection of R1  generates the required reference current; (4 marks)

3) The output resistance of Q3-Q4 pair, and the output resistance of Q5-Q6 pair; (8 marks)

4) The small signal voltage gain of the amplifier circuit; (14 marks)

5) The input and output resistance of the amplifier circuit. (8 marks)

• Simulation Hint 1: For Q1 transistor,you will need to provide an appropriate DC gate voltage for operation.

o The DC gate voltage can be calculated theoretically using the drain current

o The DC gate voltage may need to be fine tuned in simulation based on calculated result

• Simulation Hint 2: For NMOS transistors, use the “MOS_N” available in the component library. To change the parameters, double click the component.

o You can change the transistor length and width directly in the “Value” tab.

o To change other parameters, click “Edit model”, and then change accordingly. Here, you will

need to change “KP” (i.e., kn(′) . Please note this is different from Workshop 1), “VTO” (i.e., Vtn ), and “LAMBDA” (i.e., λn ). Other parameters can be left as default.

• Simulation Hint 3: For the PMOS transistors, use the “MOS_P” in the component library. The parameters can be changed in the similar way as in Hint 2:

o You can change the transistor length and width directly in the “Value” tab.

o To change other parameters, click “Edit model”, and then change accordingly. Here, you will

need to change “KP” (i.e., kp(′) . Please note this is different from Workshop 1), “VTO” (i.e., Vtp ), and “LAMBDA” (i.e., λp ). Other parameters can be left as default.

• Simulation Hint 4: For the BJT transistors, use the “BJT_NPN” in the component library. To

change the parameters, double click the component and then select “Edit model” . You will need to change “BF” (i.e., β), “VAF” (i.e., early voltage) and “VJE” (i.e., VBE ) here.

• Simulation Hint 5: For output resistance simulations, please use the method in Workshop 2, Step

5.2 (Option 1) or Step 6.2 (Option 2).

Total marks: 100